Potential-induced degradation: mechanisms and prevention in PV

Potential-induced degradation (PID) is one of the few failure modes that can strip a well-installed crystalline silicon plant of 10-30% of its yield within two or three seasons, then largely reverse if the conditions that caused it are removed. That reversibility is what makes it maddening: a module that tests fine in a flash chamber can shunt badly in the field, and a string that looked ruined in August can partially recover after a few cool, dry nights.

This article is for asset managers, O&M engineers and designers specifying string inverters and module BOMs who need to understand why PID happens, how to catch it before it shows up as a yield shortfall, and which design choices actually prevent it rather than just delaying it.

We cover the underlying physics (PID-shunting versus PID-polarisation versus corrosion-type PID), the system-voltage and humidity drivers, field detection methods, the encapsulant and cell technology choices that matter, earthing and inverter-side mitigation, and the IEC TS 62804 test framework used to qualify modules.

What PID actually is

PID is a leakage-current-driven degradation mechanism that occurs when a large voltage difference exists between a cell and the grounded module frame, driving ion migration through the encapsulant, glass and cell surface. In a typical string with a grounded negative terminal (common with many transformerless inverters in Europe), cells near the negative end of the string sit at several hundred volts negative relative to frame potential. Under humid, warm conditions this bias drives sodium ions out of the soda-lime glass, through the encapsulant, and onto or into the cell surface.

There are three broadly recognised sub-mechanisms:

• PID-shunting: sodium ions accumulate at the emitter surface and in stacking faults, creating localised shunt paths across the p-n junction. This is the classic p-type PID seen in older aluminium back surface field (Al-BSF) cells, and it shows up as a drop in shunt resistance, fill factor and open-circuit voltage.
• PID-polarisation: charge accumulates at the cell surface or within the anti-reflective coating (particularly on PERC and some n-type cells), altering surface passivation and increasing recombination without necessarily creating a hard shunt. This form is often largely reversible.
• Corrosion-type PID: sustained ion migration and moisture ingress corrode the transparent conductive oxide or metal grid, most relevant to thin-film (CIGS, a-Si) technology, and this form is typically not reversible.

The three modes are frequently lumped together in field reports, but they respond differently to mitigation and recovery, which matters when deciding whether a strategy of "wait for winter" is a legitimate plan or wishful thinking.

Drivers: voltage, humidity, temperature

PID severity scales with three interacting factors: the magnitude of the negative bias relative to ground, moisture ingress into the module (governed by humidity, temperature and time of wetness), and cell/encapsulant susceptibility.

System voltage matters directly - a 1500V DC design pushes end-of-string cells to roughly double the bias of an equivalent 750V-referenced layout, all else equal, which is why 1500V utility plants with grounded architectures require materially better PID resistance from modules and encapsulants than older 600-1000V residential systems. Damp heat conditions (high ambient humidity combined with dawn/dusk temperatures that allow condensation on and inside the laminate) accelerate ion mobility far more than dry heat at the same temperature. This is why PID is disproportionately reported in coastal, tropical and monsoon climates, and in plants using thinner or lower-resistivity encapsulants that pass moisture more readily.

Encapsulant volume resistivity is the single largest controllable variable. Standard EVA formulations historically had lower volume resistivity and higher moisture permeability than PID-resistant EVA grades, ionomer encapsulants, or polyolefin (POE) sheets, which is why encapsulant choice now appears explicitly in module datasheets for utility-scale supply.

Field detection

PID cannot be reliably diagnosed from energy yield data alone, because seasonal variation, soiling and inverter clipping create confounding signal. Practical field methods, roughly in order of effort:

1. String-level I-V curve tracing: a suppressed fill factor and Voc with a normal Isc is the classic PID signature, distinguishing it from soiling (which suppresses Isc) or hot-spot damage (which distorts the curve shape further).
2. Electroluminescence (EL) imaging: performed at night or in a darkened enclosure, PID-affected cells show characteristic dark bands, typically strongest at the edges of the cell nearest the frame, in cells at the negative end of the string.
3. Infrared thermography: PID-shunted cells run measurably warmer under load due to increased leakage current, visible as diffuse or cell-level hotspots, though this is a weaker signal than EL.
4. String position correlation: comparing underperformance against string position and polarity orientation is a fast triage step - if underperforming strings cluster consistently at the grounded negative end across multiple inverters, PID is the leading hypothesis before further testing.

None of these methods alone is conclusive; a defensible diagnosis combines position correlation, I-V signature and EL confirmation on a sample of suspect modules.

Prevention: cell and encapsulant choice

The most durable fix is specifying components qualified as PID-resistant under recognised test protocols (see below) rather than relying on system-level mitigation alone, because system-level fixes protect against future degradation but do not undo material susceptibility already built into the module.

Relevant choices at specification stage:

• Cell technology: n-type cells (TOPCon, heterojunction) are generally less susceptible to classic PID-shunting than p-type Al-BSF, though PERC and TOPCon cells can still show PID-polarisation effects under adverse conditions; susceptibility should be verified per product, not assumed from cell type alone.
• Encapsulant: PID-resistant EVA, ionomer or POE encapsulants with higher volume resistivity and lower moisture ingress substantially reduce ion migration rates; POE is now common in bifacial and 1500V-rated modules for this reason.
• Glass and coatings: anti-reflective coatings and glass surface treatments can influence surface leakage current paths; datasheets from reputable manufacturers now often quote PID test results explicitly (for example "PID free per IEC TS 62804-1, 96h, 85degC/85%RH, -1500V").
• Cell edge isolation and lamination quality: poor lamination (voids, delamination at cell edges) creates faster moisture ingress paths and accelerates PID regardless of encapsulant grade, so factory quality control is not a secondary concern.

Mitigation: earthing strategy and anti-PID recovery

Where the module fleet is already installed and PID-susceptible, two system-level levers exist.

Inverter earthing / negative or positive grounding: shifting the string reference so that no cell sits at a large negative bias relative to ground removes the driving force for classic PID-shunting. Some central and string inverters support switchable or resistively-grounded negative/positive terminals for exactly this reason. This does not repair existing shunt damage but halts further progression, and for polarisation-type PID it can allow partial recovery over subsequent months as the reverse field slowly redistributes accumulated charge.

Anti-PID night-time recovery ("PID box" or inverter-integrated recovery): a separate low-power device applies a reverse bias (often around 500-1000V, polarity opposite to the daytime PID-driving bias) across the array at night when there is no production to lose, actively driving ions back toward the glass and reversing polarisation-type degradation, and to a lesser extent some shunting-type damage. Recovery is typically partial (commonly reported in the range of 30-70% of lost power) and is not effective against corrosion-type PID, which is not an ionic-migration-reversible mechanism.

Neither approach substitutes for correct component specification; both are best understood as damage-limitation for existing assets rather than a design strategy for new plants where PID-resistant modules are readily available at negligible cost premium.

Worked example: bias magnitude in a 1500V string

Consider a 1500V DC string with negative-terminal grounding, 28 modules of 46.5V Vmp each.

String Vmp = 28 x 46.5V = 1,302V.

The module nearest the positive end of the string sits close to 0V relative to ground; the module nearest the negative end sits close to -1,302V relative to ground (minus wiring losses, approximated as negligible here). A cell within that end module can therefore experience a bias approaching -1,300V relative to frame potential, roughly 1.7 times the bias a 750V-referenced design (Vmp approx 754V under the same string length assumption) would present at the same string position. This arithmetic is why PID-resistance requirements are typically tightened, not relaxed, as designs move to 1500V architectures.

Comparison: PID resistance test outcomes by encapsulant class

Figures are representative order-of-magnitude ranges compiled from published damp-heat/PID qualification studies; actual results vary by manufacturer, lamination quality and test voltage polarity, and datasheet-quoted results for the specific product should always take precedence over generic figures.

IEC/TS 62804 test methods

IEC TS 62804-1 (crystalline silicon) and the related thin-film provisions define standardised PID qualification: modules are subjected to elevated temperature and humidity (commonly 85degC/85% relative humidity, though a lower-humidity 60degC/60%RH method exists for climates or products where condensation-driven testing is less representative) with a sustained system-voltage bias (commonly -1000V or -1500V depending on target system voltage) applied for a defined duration, typically 96 hours, followed by power measurement, and often an insulation and wet leakage current re-check. IEC TS 62804-2 defines a chamber-based test method and procedure detail; module or system suppliers often quote compliance simply as "PID free" together with the applied voltage, duration and humidity condition, and the specific test parameters should be checked against the target system's actual operating voltage rather than assumed.

These tests are qualification tests, not warranties: passing a 96-hour accelerated test at a given voltage does not guarantee zero PID at a different (higher) system voltage or under field conditions with longer wetness duration than the test simulates, which is why voltage and duration parameters used in a supplier's test report matter as much as the pass/fail result itself.

Common mistakes

• Assuming n-type or PERC modules are immune to PID because "PID is a p-type Al-BSF problem" - polarisation-type PID affects many modern cell architectures.
• Diagnosing PID from yield underperformance alone without I-V or EL confirmation, leading to unnecessary warranty claims or missed root causes (soiling, connector corrosion, MPPT tracking errors).
• Specifying anti-PID recovery boxes as a substitute for PID-resistant modules on new-build utility projects, when the incremental module cost is typically far lower than the recovery hardware and its parasitic energy use over plant lifetime.
• Ignoring string earthing configuration when moving an existing PERC/BSF fleet to a higher-voltage inverter replacement, effectively increasing bias on modules never qualified for it.
• Treating a supplier's generic "PID free" marketing claim as equivalent to a project-specific IEC TS 62804 test report at the actual system voltage and climate-relevant humidity condition.
• Overlooking lamination and QC variability within a single nominal product line - two batches of the same nameplate module can show materially different PID susceptibility.

Frequently asked questions

Does PID reduce module lifetime, or just temporary output?

It depends on the sub-mechanism: PID-polarisation is often substantially reversible with corrective bias or environmental change, while PID-shunting and corrosion-type PID cause structural changes to the junction or conductive layers that are largely permanent. Field assessment should not assume recovery without evidence specific to the affected modules.

Can PID be fixed by re-torquing or re-earthing racking alone?

No. Racking earthing addresses personnel safety and lightning protection, not the DC-side string-to-frame potential difference that drives PID; the fix requires addressing inverter grounding reference, encapsulant properties, or applying active reverse-bias recovery.

Is PID more common in hot climates or humid climates?

Humidity and time-of-wetness are the dominant drivers, not temperature alone; a warm, dry desert climate can show less PID than a moderate but humid coastal site, all else equal, because ion mobility through the encapsulant requires moisture ingress.

How much yield loss justifies installing an anti-PID recovery device retroactively?

There is no fixed threshold, but a common decision framework compares the discounted value of the expected partial recovery (typically 30-70% of lost power, degrading again if the underlying driver is not also addressed) against the device's capital and ongoing energy cost over the remaining plant life, using project-specific figures rather than generic recovery percentages.

Does bifacial module design change PID risk?

Bifacial modules often use glass-glass construction and POE-class encapsulants for durability reasons unrelated to PID, which happens to improve PID resistance too, but bifacial design itself is not inherently more or less PID-prone; the encapsulant and cell technology choice remains the determining factor.

Standards and references

• IEC TS 62804-1:2015, Photovoltaic (PV) modules - Test methods for the detection of potential-induced degradation - Part 1: Crystalline silicon
• IEC TS 62804-2, Photovoltaic (PV) modules - Test methods for the detection of potential-induced degradation - Part 2: Thin-film
• IEC 61215 and IEC 61730, general PV module design qualification and safety qualification series, referenced context for damp-heat and insulation testing
• Fraunhofer ISE, published studies on PID mechanisms and encapsulant volume resistivity effects in crystalline silicon modules
• NREL, PV module reliability and degradation mode research, including PID field studies
• IEA PVPS Task 13, performance and reliability of photovoltaic systems, field failure mode reporting

For related design context, see our explainers on MPPT operation, cable sizing and voltage drop, and the system sizing calculator for string voltage planning. Definitions of shunt resistance, fill factor and other terms used here are in the glossary, and the inverter sizing calculator is useful when evaluating grounding-configuration changes during inverter replacement.